<#1375 Adding analog macros including manually rou...
# openlane-development
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#1375 Adding analog macros including manually routed interconnects to digital macros shows congestion errors Issue created by 3x10e8 Description I am trying to incorporate analog macros as blackbox'd verilog with LEF/GDS into
caravel_user_project
using openlane for top-level integration. These analog macros include mimcaps utilizing metal4 and metal5, therefore PDN cannot go on top of them to prevent shorting supplies and grounds. The analog macro also includes manual routing aimed to interface the analog block to corresponding digital pins, which is possibly giving congestion errors. Expected behavior I did not expect congestion errors for blackbox'd macros internally connecting analog block ports to their corresponding digital pins (which is what I suspect is causing the higher congestion at the analog/digital interface below:)

Screen Shot 2022-09-19 at 10 57 27 PM

Zooming in:

Screen Shot 2022-09-19 at 10 57 06 PM

I also expected the PDNgen to completely avoid the analog macro areas. I have tried painting OBS layers but it doesn't quite seem to work (not included in this issue's submission). In the current reproducible, we still see power lines entering the analog macro `analog_core_Q_0`:

Screen Shot 2022-09-19 at 10 59 19 PM

Environment
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Kernel: Linux v3.10.0-1160.76.1.el7.x86_64
Distribution: centos 7
Python: v3.6.8 (OK)
Container Engine: docker v20.10.17 (OK)
OpenLane Git Version: 87173889682b67c490c96ded79b93aa2bb570a48
pip: INSTALLED
python-venv: INSTALLED
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PDK Version Verification Status: OK
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Git Log (Last 3 Commits)

8717388 %cI Point to `open_pdks` upstream (#1372) - Kareem Farid -  (%D)
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Git Remotes

origin	<https://github.com/The-OpenROAD-Project/OpenLane> (fetch)
origin	<https://github.com/The-OpenROAD-Project/OpenLane> (push)
Reproduction Material Issue Reproducible: https://github.com/3x10e8/fossi_cochlea/tree/main/openlane/user_project_wrapper/runs/22_09_19_22_38/issue_reproducible Logs
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[STEP 11]
[INFO]: Running Global Routing Resizer Timing Optimizations (log: ../local_disk/fossi_cochlea/openlane/user_project_wrapper/runs/22_09_19_22_38/logs/routing/11-resizer.log)...
[ERROR]: during executing openroad script /openlane/scripts/openroad/resizer_routing_timing.tcl
[ERROR]: Log: ../local_disk/fossi_cochlea/openlane/user_project_wrapper/runs/22_09_19_22_38/logs/routing/11-resizer.log
[ERROR]: Last 10 lines:

[INFO GRT-0101] Running extra iterations to remove overflow.
[INFO GRT-0197] Via related to pin nodes: 147
[INFO GRT-0198] Via related Steiner nodes: 0
[INFO GRT-0199] Via filling finished.
[INFO GRT-0111] Final number of vias: 424
[INFO GRT-0112] Final usage 3D: 14698
[ERROR GRT-0118] Routing congestion too high. Check the congestion heatmap in the GUI.
Error: resizer_routing_timing.tcl, 34 GRT-0118
child process exited abnormally

[ERROR]: Creating issue reproducible...
The-OpenROAD-Project/OpenLane