#1136 Is there a developer-recommended way of turning off all hold timing fixes? Issue created by tdene Prompt I am not an expert with OpenROAD's code-base, and I would like to seek advice. I am experimenting with the procedural generation of up to 10^64 variants of the same sub-design. This sub-design is not meant to be a full design (no clock for example), and is not even meant to represent a complete timing path in a realistic setting. It would only be part of some longer paths. The OpenLane flow offers a very convenient way to characterize a large amount of variants of such a sub-design in parallel. It is straight-forward to turn off some of the here-unnecessary steps that just add variance to the final results. There's flags to turn off CTS and diode-insertion, it is straight-forward to customize the power-grid, it is easy to define pin layers and locations. These all work well. I also want to turn off hold-fixing entirely, as it introduces noise into my data while offering no realistic benefit. Question Is there a developer-recommended way of turning off all passes meant to fix hold timing? I have found the

ECO_ENABLE

flag, which can be used to enable / disable final hold timing fixes, post-OpenROAD. This is certainly one step of the answer. However, the normal routing passes also call upon OpenROAD to perform hold time fixing here and here. There are flags that allow for the tweaking of this process:

HOLD_SLACK_MARGIN

and

HOLD_MAX_BUFFER_PERCENT

. It seems to me that a definitive way of turning off all hold-fixing passes would be to set the following flags: •

ECO_ENABLE = 0

•

PL_RESIZER_SETUP_MAX_BUFFER_PERCENT = 0

•

PL_RESIZER_HOLD_SLACK_MARGIN = -1

•

GLB_RESIZER_SETUP_MAX_BUFFER_PERCENT = 0

•

GLB_RESIZER_HOLD_SLACK_MARGIN = -1

To those that are more familiar with the code-base than I am, does this seem like the solution that I am searching for? The-OpenROAD-Project/OpenLane