#232 Conflicting case causes extraction of duplicate ports Issue created by d-m-bailey MPW-8 slot-015 uses

sram_2kbyte_1rw1r_32x512_8

. The

openram_dff

cell has both

VDD

and

vdd

labels and

GND

and

gnd

labels on the layout. This extracts to

.subckt EL_G3_sky130_fd_bd_sram__openram_dff clk Q D vdd gnd VDD GND
X0 VDD a_28_102# a_389_712# VDD sky130_fd_pr__pfet_01v8 ad=0.42 pd=3.28 as=0.315 ps=3.21 w=3 l=0.15
X1 a_47_611# clk a_197_712# VDD sky130_fd_pr__pfet_01v8 ad=0.675 pd=3.45 as=0.315 ps=3.21 w=3 l=0.15
X2 a_239_76# clk VDD VDD sky130_fd_pr__pfet_01v8 ad=0.795 pd=6.53 as=0.42 ps=3.28 w=3 l=0.15
X3 a_197_712# D VDD VDD sky130_fd_pr__pfet_01v8 ad=0.315 pd=3.21 as=0.42 ps=3.28 w=3 l=0.15
X4 QN clk a_547_102# GND sky130_fd_pr__nfet_01v8 ad=0.225 pd=1.45 as=0.105 ps=1.21 w=1 l=0.15
X5 GND Q a_739_102# GND sky130_fd_pr__nfet_01v8 ad=0.14 pd=1.28 as=0.105 ps=1.21 w=1 l=0.15
...

with floating

vdd

and

gnd

ports. During LVS, the parent circuit

dff_buf_0

matches topologically but has a port mismatch.

Netlists match uniquely with port errors.                                         

Subcircuit pins:                                                                  
Circuit 1: EL_G3_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0                      |Circuit 2: dff_buf_0
----------------------------------------------------------------------------------|----------------------------------------------------------------------------------
D                                                                                 |D
clk                                                                               |clk
Q                                                                                 |Q
vdd                                                                               |vdd
EL_G3_sky130_fd_bd_sram__openram_dff_0/vdd                                        |(no matching pin)
gnd                                                                               |gnd
Qb                                                                                |Qb
---------------------------------------------------------------------------------------------------------------------------------------------------------------------

netgen attempts to alter the pin list to match, and gives this message.

Port number 7 greater than number of ports 6
Port number 7 greater than number of ports 6
Port number 7 greater than number of ports 6
Cell pin lists for EL_G3_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0 and dff_buf_0 altered to match.

At the higher levels, the

gnd

pin of the a sister cell is seen as connected to

vdd

even though it is not.

vdd

is seen as disconnected even though it is not.

Cell dff_buf_array_0 (1) disconnected node: dff_buf_0:dff_r0_c0/sky130_fd_bd_sram__openram_dff:dff_buf_dff/VDD
Cell dff_buf_array_0 (1) disconnected node: dff_buf_0:dff_r0_c0/pinv_2:dff_buf_inv1/vdd
Cell dff_buf_array_0 (1) disconnected node: dff_buf_0:dff_r0_c0/pinv_3:dff_buf_inv2/vdd

Net: vdd                                                                          |Net: vdd
  EL_G3_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2/vdd = 1                          |  sky130_fd_bd_sram__openram_dff/VDD = 1
  EL_G3_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3/vdd = 1                          |  pinv_2/gnd = 1
  EL_G3_sky130_fd_bd_sram__openram_dff/vdd = 1                                    |  pinv_3/vdd = 1
                                                                                  |
Net: gnd                                                                          |(no matching net)
  EL_G3_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2/gnd = 1                          |
  EL_G3_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3/gnd = 1                          |
  EL_G3_sky130_fd_bd_sram__openram_dff/gnd = 1                                    |
---------------------------------------------------------------------------------------------------------------------------------------------------------------------

Will also log a netgen issue. RTimothyEdwards/magic