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Title
a

Antony Brayan Sanabria Calderón

04/02/2023, 5:42 PM
Hi everyone, I hope you're doing well. I'm currently working with cap_var_lvt and I've encountered an issue with importing the spice file to Magic. It appears to have four terminals, and I need to connect each of these three terminals to a different node. However, I'm unsure which terminal in the Magic block corresponds to each pin in Xschem.
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Mitch Bailey

04/02/2023, 6:00 PM
@Antony Brayan Sanabria Calderón If I’m not mistaken, the cap_var_lvt is basically an nmos device over nwell instead of the normal pwell/psub. The red contacts correspond to
c0
in the schematic - you can connect to either one. The green contacts correspond to
c1
and although they are physically shorted to the same nwell, I suggest connecting them with metal. The third terminal in the schematic,
b
, is the psub connection which you probably want to place nearby.
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Antony Brayan Sanabria Calderón

04/02/2023, 7:19 PM
Thanks a lot @Mitch Bailey
👍 1
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Stefan Schippers

04/03/2023, 8:14 AM
For better frequency response capacitor terminals are present on both sides, both for poly gate and nwell.
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