I am trying to add a constraint on the generated c...
# openlanez
Ziad Tarek
03/28/2023, 1:54 PMI am trying to add a constraint on the generated clock using "create_generated_clock" but the problem is when I add the option of "get_ports " the tool fails to read the hierarchy name so is there any one here that can help me or tried before to do this on yosys tool
Ziad Tarek
03/28/2023, 1:54 PMIMG_20230328_153637_594.jpg,IMG_20230328_153534_872.jpg,IMG_20230328_152958_617.jpg,IMG_20230328_152534_326.jpg
a
Arman Avetisyan
03/28/2023, 1:56 PMyou dont have a signal/port named clk_branc
nvm, I am wrong
Arman Avetisyan
03/28/2023, 2:00 PMIn the create a generated clock you are get_ports-ing the clk_branch port, but there are no ports with this name in the top level.
Maybe try get_nets
z
Ziad Tarek
03/28/2023, 2:42 PMI tried "get_nets' but it still doesn't work
a
Arman Avetisyan
03/28/2023, 3:17 PMpost error messages
Arman Avetisyan
03/28/2023, 3:17 PMwe cant debug things without any information