https://open-source-silicon.dev logo
Title
m

Matthew Guthaus

03/27/2023, 8:30 PM
Is it possible to see our chip along with the RDL and solder bump layers? Each slot has the full caravel with IOs, but I'm wanting to poke around the packing too. (This is mostly as an example for my class...)
t

Tim Edwards

03/28/2023, 12:23 AM
By "see", do you mean that you want a picture or rendering of the die?
m

Matthew Guthaus

03/28/2023, 2:43 AM
@Tim Edwards I want to open the layout ideally
t

Tim Edwards

03/28/2023, 12:41 PM
The bump bond layout is for a different vendor and different process, so it's a separate file. I added some layers in the tech file for magic to accommodate the bump bonding masks, so you can view both at the same time. But you will need to read in the bump bond GDS and overlay the caravel top level (presumably this can be done in klayout as well, although I haven't tried it). You can find the GDS for the bump bonding in the
caravel_mpw-one
repository under
mag/caravel_bump_bond.mag
or
gds/caravel_bump_bond.gds.gz
.
👍 2
p

proppy

04/03/2023, 6:27 AM
I remember also seeing the die plot in the caravel harness documentation: https://caravel-harness.readthedocs.io/en/latest/supplementary-figures.html#die-plot