open-source-silicon.dev

inverter_blo.mag

inverter.mag

a.JPG

Hello, <@U016EM8L91B>, I have a type of bug with this design, the gds keeps generating and the entire program crashes, but with the N=3 and N=7 oscillator I had no problem, so I don't know what it could be.

Looks like a combination of a bug in the "flatten" command code plus a very poorly-thought out double loop in the GDS write routine (both of which relate to ports, so they're both my fault).

Quick description of the problem:  The ports in `inverter_blo.mag` got assigned numbers at the upper range of an unsigned integer.
Quick fix:  Edit inverter_blo.mag and find the two lines:
```port 1073741821 nsew
port 1073741823 nsew```
and change them to
```port 0 nsew
port 1 nsew```
I, for my part, will have to fix both issues in the code.

I'm not sure where the port numbers are getting messed up, but I did fix the stupidly coded loop in the GDS write routine, so that won't happen in the future.

FYI:  You probably should not be writing GDS from a flattened layout.  The only reason to flatten a layout is to run full R-C extraction on it.  For everything else, you want to keep the hierarchy.