Matthew Guthaus
03/21/2023, 5:40 PMAmro Tork
03/21/2023, 6:05 PMMatthew Guthaus
03/21/2023, 6:05 PMAmro Tork
03/21/2023, 6:06 PMMatthew Guthaus
03/21/2023, 6:06 PMAmro Tork
03/21/2023, 6:06 PMpip install -r requirements.txt
Matthew Guthaus
03/21/2023, 6:07 PMAmro Tork
03/21/2023, 6:07 PMMatthew Guthaus
03/21/2023, 6:13 PMERROR: Reading /openlane/sky130_klayout_pdk/sky130_tech/tech/sky130/lvs/sky130.lylvs: XML parser error: error occurred while parsing element in line 31, column 49
ERROR: Reading /openlane/sky130_klayout_pdk/sky130_tech/tech/sky130/lvs/sky130.lylvs: XML parser error: error occurred while parsing element in line 31, column 49
Amro Tork
03/21/2023, 6:17 PMMatthew Guthaus
03/21/2023, 6:18 PMAmro Tork
03/21/2023, 6:19 PMMatthew Guthaus
03/21/2023, 6:20 PMAmro Tork
03/21/2023, 6:20 PMdonn
03/21/2023, 6:20 PMAmro Tork
03/21/2023, 6:21 PMMatthew Guthaus
03/21/2023, 6:21 PMAmro Tork
03/21/2023, 6:21 PMMatthew Guthaus
03/21/2023, 6:21 PMAmro Tork
03/21/2023, 6:22 PMMatthew Guthaus
03/21/2023, 6:22 PMAmro Tork
03/21/2023, 6:22 PMTim Edwards
03/21/2023, 6:26 PMKLAYOUT_URL = <https://github.com/efabless/sky130_klayout_pdk>
Matthew Guthaus
03/21/2023, 6:26 PM30 # You should have received a copy of the GNU Affero General Public License
31 # along with this program. If not, see <<https://www.gnu.org/licenses/>>.
Amro Tork
03/21/2023, 6:29 PMAmro Tork
03/21/2023, 6:30 PMMatthew Guthaus
03/21/2023, 6:31 PMAmro Tork
03/21/2023, 6:34 PMMatthew Guthaus
03/21/2023, 6:35 PMERROR: /openlane/pdks/sky130A/libs.tech/klayout/pymacros/cells/via_generator.py:23: No module named 'gdsfactory'
/openlane/pdks/sky130A/libs.tech/klayout/pymacros/cells/via_generator.py:23
/openlane/pdks/sky130A/libs.tech/klayout/pymacros/cells/vias.py:21
/openlane/pdks/sky130A/libs.tech/klayout/pymacros/cells/__init__.py:22
/openlane/pdks/sky130A/libs.tech/klayout/pymacros/sky130.lym:9 (class ModuleNotFoundError)
Mitch Bailey
03/21/2023, 11:22 PMHierarchical analysis: KLayout got a hierarchical layout processing engine to support hierarchical LVS. Hierarchical processing means that boolean operations happen inside the local cell environment as far as possible. As a consequence, devices are recognized inside their layout cell and layout cells are turned into respective subcircuits in the netlist. The netlist compare will benefit as it is able follow the circuit hierarchy. This is more efficient and gives better debugging information in case of mismatches. As a positive side effect of hierarchical layout processing the runtimes for some boolean and other operations is significantly reduced in most cases.
Hierarchically stable: KLayout won't modify the layout's hierarchy nor will it introduce variants - at least for boolean and some other operations. This way, matching between layout and schematic hierarchy is maintained even after hierarchical DRC operations. Variants are introduced only for some anisotropic operations, the grid snap method and some other features which require differentiation of cells in terms of location and orientation.
Matthew Guthaus
03/21/2023, 11:24 PMAmro Tork
03/22/2023, 3:28 AMMitch Bailey
03/22/2023, 7:05 AM