Morris Frazier
03/18/2023, 3:15 AMmagic
but I've been busy and I haven't even got a simple inverter working yet.
naturally, it got me thinking whether there any analog design paradigms in which one doesn't do the layout by hand.
Is there any reason not to lay out an analog design using simulated annealing (SA) based tools similar to the way digital ones are laid out?
I reckon a SA tool could, for example, be smart enough to minimize the wire length of nets marked critical by the designer, etc.
I realize the noise of such a circuit might be somewhat higher than a handcrafted one but sometimes the design time matters also.
does anyone have anything to recommend, or other thoughts along these lines?
or is there a good reason to disrecommend such an approach?
while searching this I found this interesting tidbit on SE: https://electronics.stackexchange.com/a/60961
it doesn't mention noise levels but since they (were) customizing only the via layer they must have had additional noise from extra tracks and potential interconnection points tooSUMANTO KAR
03/18/2023, 8:57 AMLuis Henrique Rodovalho
03/18/2023, 9:09 AMThomas Pluck
03/18/2023, 9:33 AM