I can't figure out how to import the netlist, and also how to integrate it with the caravel project

I had two problems while processing global placement of RePlAce. When I ran the global placement(GP) with the benchmark of ISPD 2015 contest, there were two benchmarks that could not process the GP stage smoothly. ( mgc_superblue16_a and mgc_superblue19 ) *benchmark of ISPD 2015 : https://www.ispd.cc/contests/15/web/downloads.html (Hidden benchmark designs ) I processed the following commands in my tcl file: read_lef {tech.lef} read_lef ${cells.lef} read_def ${floorplan.def} global_placement -density 1.0 After I processed benchmark of mgc_superblue19, the last 2 rows of error messages are: [NesterovSolve] Iter: 680 overflow: 0.18357 HPWL: 14598922301 [ERROR GPL-0307] RePlAce divergence detected. Re-run with a smaller max_phi_cof value. When I try smaller max_phi_cof value ( 1.1,1.3) with following command: global_placement -density 1.0 -max_phi_coef 1.03 There still had error message: [NesterovSolve] Iter: 680 overflow: 0.18357 HPWL: 14598922301 [ERROR GPL-0307] RePlAce divergence detected. Re-run with a smaller max_phi_cof value. And I further try smaller max_phi_cof global_placement -density 1.0 -max_phi_coef 1.01 The error will be solved, but the overflow will not decrease less than 0.1 after 5000 iterations of NesterovSolve. The last 2 rows of messages are: [NesterovSolve] Iter: 4990 overflow: 0.362241 HPWL: 12902711426 [NesterovSolve] Iter: 5000 overflow: 0.362278 HPWL: 12902395788 Another problem is that after I processing mgc_superblue16_a, the error message showed that : [ERROR GPL-0305] RePlAce diverged at newStepLength. But I have no idea how to solve this problem. Please help me, thanks!

like between floorplanning and placement

@SUMANTO KAR @Tim Edwards magic and netgen are ok. Only xchem is left to be straightened out.

@Talha Bin Azmat how have you done the installtion of xyce ? I have difficulty in installing Trilinos. Any help?

Hi, https://github.com/efabless/sky130_sram_macros, for srams in this github, what is the access latency when reading the sram?

Hello Everyone, For the deliverable of the precheck results for a moc design on August 25th, is that the local precheck? Or the efabless website one? Or does it not matter in this case? Thanks a lot!

Does the wishbone bus used in the caravel soc follows the B4 version of the protocol or or is it some other version?

How to rectify 'error during executing openroad script /openlane/scripts/openroad/resizer.tcl' ? any help

I've been getting the following message when hardening user_project_wrapper:

Result: The top level cell failed pin matching.

vccd1 and vssd1 pins are not being connected.