Hello @Stefan Schippers @Tim Edwards @Mitch Bailey Excuse me, is there a way or script to characterize DAC circuits such as IND, DNL, SNR,....etc in Xschem, pls?

I once created CACE system templates for characterizing a DAC. I don't have them on my computer at home so they must be on the Open Galaxy server. I don't think I know how to log into the development server any more. I'll check if I have it on the production server.

@Tim Edwards Thank you very much. The shared file is a good guide for me.

I am trying to get the CACE system back up and running, but it will probably be a while, since I'm working on a number of other things at the same time.

Appreciated totally.

@Ahmed Reda: Success getting CACE to run on a sky130 project (the Blizzard 8-bit DAC). Needs a lot of cleaning up, but it's getting there.

@Tim Edwards It seems that idd is only calculated. however, other parameters can be obtained, right! Can I access CACE!, is it a specific machine or What!

@Ahmed Reda: As of that post yesterday, I had only tried running the one simulation. Today, I have all the simulations running, although they are not all giving meaningful results. CACE can be obtained from open_pdks installation. If you aren't trying to do a runaround of the standard Makefile prefix, then it installs into a directory called

scripts

at the same level as the PDKs (e.g.,

sky130A

or

gf180mcuD

) and is called

cace.py

. However, you have to have a valid datasheet JSON file and valid testbench templates for it to run. As soon as I have things in a "somewhat usable" state, I will push the CACE updates to open_pdks, and push the DAC configuration to a branch on the blizzard repository. It would be helpful to work with your bandgap example. We previously (some years ago) ran a design contest for designing a bandgap, with CACE used for the specification, simulation, characterization, and comparison of different designs. The testbench netlist templates I worked up for bandgap characterization are the most refined and stable. The DAC templates were done just before we started work on the Raven chip, so they were the last additions I made to CACE. That added a lot of extra features like mixed-signal simulation and Monte Carlo simulation, some of which is going to take some effort to get working again.