@User I like the idea. Some additional test points to consider: 1. DRC (magic & klayout) of chips which pass Calibre DRC 2. DRC of chips that fail Calibre DRC 3. LVS of whole chips 4. Comparitive sims with analogue models using ngspice, Xyce and spectre A lot of these tests will fail out the gate given the current state right now. However getting a failing test is meant to be the first step in unit testing anyway. Plus it gives a pointed direction of things that need fixed/aligned