As for colors, xschem is optimized for speed and portability, so its graphical rendering is based on layers and programming language is strict C89. A layer defines color, fill style etc. Graphical primitives can be drawn on any layer. So, yes, multi colored objects are obviously possible. Any line, rectangle, poly, circle, text can be on a different layer in a symbol. This of course is less flexible but much faster expecially on older machines, because i can use draw-segments, draw-rectangles, draw-arcs etc. , where an array of objects is drawn with a single function call. I know most eda tools have graphical objects with a lot of attributes specifying line width, fill style, line style, and many more, but those tools are also incredibly slower, some have O(N^x) performance w.r.t. N=number of objects, where x>1 (gschem). These optimizations are also effective in reducing memory footprint. A schematic test network with 500k instances (components, subcircuits) is loaded by xschem using 110MB resident RAM memory and can be opened with no problems on an intel atom netbook with 1GB RAM (this is my perf test machine 🙂 ) . Crash limit on gschem is some thousands (may be 16K objects, delete some, undo operation ->crash). eeschema is much better in handling big designs but is a true memory hog. These limitations can prevents some operations like importing a big synthetized logic block back into the schematic (may be there is no need to do that, but this must be doable option if designer decides to do so). Beziers /ellipses are not implemented, my question is if these are really needed for vlsi designs. I have worked 27 years in IC design in 3 different companies (STM, Intel and Micron, all using Cadence Virtuoso for frontend and backend) and no one chip database we taped out had ellipses or beziers. These primitives can be added of course. On the other hand xshem has true antialiasing text fonts (text also can be drawn on any layer) that make tiny characters more readable on screen. eeschema to this aspect is really horrible (even worse than Cadence Virtuoso). According to my tests the only other OSS schematic tool that has any hope to handle true VLSI designs is xcircuit. All the other OSS schematic tools i have evaluated barely handle hierarchy/parametrized modules, these features were clearly added late in the software design and not at time zero, making some features difficult to implement efficiently (example: follow a set of highlight nets thru the hierarchy). Another characteristic of xschem is that electrical connectivity is built into the core, because as a fundamental requirement the time to produce netlists / flag ERC errors / highlight nets must be (almost) instant, at least for small to medium sized designs. This means no scripting at all for computation-intensive tasks. (no Lisp/Scheme, no Skill, no Python). Extension language (tcl in xschem's case) is used to provide a command language to talk to the schematic tool (and to provide the GUI), all user actions have a scripting equivalent, so it is extremely easy to build schematics with tcl generators. It is also possible to embed tcl code in the netlisting rules for a component to provide true parametric netlist generation (like a 1:N mux or decoder, where N is a parameter), although abusing this will somewhat affect performance.