I have been researching the question of what parameters might be interesting to use a parametric generator for. One idea is to optimize the performance of the cells for subthreshold low power applications (e.g. 0.2v VDD). In this case you would want to scale the length of the transistors. In the 130nm case this will be to lengths between 250 and 400nm. This thesis has some nice tables on how choose the length according to whether the transistors are used in parallel or series. (page 75) : https://curve.carleton.ca/system/files/etd/00f4809f-4179-47aa-bef4-b3ec4c52a739/etd_pdf/8af702818519242fb79ecdb0447be0aa/ramezankhani-designingfastercmossubthresholdcircuitsutilizing.pdf