06/15/2021, 1:29 PM
Two back-2-back 10-days workshops which now completes entire flow from Verilog RTL design to synthesis to SoC design to Physical Design 1st 5-day Workshop- Verilog RTL design and synthesis using Sky130: 2nd 5-day Workshop - RTL2GDS Advanced Physical design using Sky130: In past, participants who have completed above workshops, have gone ahead and build analog IPs, RISC-V SoCs and Mixed signal designs as a part of their projects after workshop. With the right direction, you can build them too and showcase them to whole world as part of your resume So go ahead, build strong resumes out of this workshop, and I am sure, it will pay you back All the best and happy learning