Hi All! In less than 2 weeks, the CHIPS Alliance is having a talk about Intel AIB and its practical applications, as well related projects like AIB-O in its monthly series, "CHIPS Alliance Deep Dive Café"! AIB itself may be intel only, but the AIB-O variant is actually usable in other processes / foundries too, and with Intel opening up their fabs, even AIB "proper" could be of interest. Below is the formal writeup/agenda: Please join us at the on AIB to be held on August 10. You may register at: https://linuxfoundation.org/webinars/chips-alliance-deep-dive-cafe-talks-aib-deep-dive-opportunities/ It will ask you to create a Linux Foundation login if you don’t already have one. This is needed to prevent “zoom bombing!”   AIB Deep Dive Kickoff: David Kehlet, Research Scientist, Intel   AXI Protocols for Die-to-Die Interoperability Nij Dorairaj, Senior Engineer, Intel Nij will cover AXI protocol over AIB and how it enables end-to-end AXI interface across chiplets. He will provide details on how AXI4-Streaming and AXI4 signals are mapped over AIB to achieve this with examples. Nij will also discuss channel alignment usage with AXI and its necessity for multi-channel protocols.   Die-to-die Standards for 3D Heterogenous Integration, Dr. Farhana Sheikh, Senior Engineer, Intel Farhana will give a high-level overview of need for die-to-die standards for 3D heterogeneous integration and a review of AIB-3D concept and our plans for open sourcing an early AIB-3D specification in 2022.   AIB Chiplet Ecosystem, Martin Won, Senior Marketing Engineer, Intel Martin will cover how AIB-based chiplets and the AIB-based chiplet ecosystem helps Intel achieve product goals and technology pathfinding to new areas of potential product development. He will also discuss how Intel built the Stratix and Agilex families, including integration of the first non-Intel designed AIB-based chiplets into our FPGA products.   AIB and Chiplet Interface Generators, Krishna Settaluri, CEO Blue Cheetah Analog Design, Inc. Krishna will cover how Blue Cheetah’s generators enable rapid configurability of circuits for chiplet interfaces and show the results / verified outputs of our AIB generator.   AIB on Standard Packaging, Lai Guan Tang, Principal Engineer, Intel Lai Guan will cover AIB scaling over different package technologies and the concept of using a common AIB PHY to scale to multiple bandwidth densities.