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#general
Title
# general
j

James Stine

09/27/2021, 7:12 PM
We made some more modifications to our prefix adder generator. It now generates pretty pictures (and even identifies paths) in addition to producing RTL-based Verilog and is all open source. You can even mix different prefix trees together: https://github.com/tdene/synth_opt_adders -- let us know any feedback.