https://open-source-silicon.dev logo
Channels
aa
abcc
activity
adiabatonauts
analog-design
announce
announcements
b2aws
b2aws-tutorial
bag
basebands
beagleboard
bluetooth
board-respin
cadence-genus
cadence-innovus
cadence-spectre
cadence-virtuoso
caravan
caravel
caravel-board
chilechipmakers
chip-yard
chipignite
chipignite2206q_stanford_bringup
chisel
coalition-for-digital-environmental-sustainability
community_denmark_dtu
containers
courses
design-review
design-services
dffram
digital-design
digital-electronics-learners
discord-mods
dynamic-power-estimation
efabless
electric
events
fasoc
fault
foss-asic-tools
fossee-iitb-esim
fossee-iitb-google-sky130
fpga
funding
fuserisc
general
generative-ai-silicon-challenge
genius-vlsi
gf180
gf180mcu
hardware-beginners
help-
ieee-sscs-cac-23
ieee-sscs-dc-21q3
ieee-sscs-dc-22
ieee-sscs-dc-23
ihp-sg13g2
images
infiniband
j-core
japan-region
junk
klayout
latam_vlsi
layouteditor
lvs
lvs-analysis
magic
magical
maker-projects
maker-zone
microwatt
mpw-2-silicon
mpw-one-clean-short
mpw-one-silicon
neuro-mem
nydesign
open_pdks
open-pdk
openadiabaticlogic
openfpga
openhighqualityresonators
openlane
openlane_cloudrunner
openlane-development
openocd
openpositarithmetic
openpower
openram
openroad
opentitan
osu
pa-test-chip
paracells
pd-openlane-and-sky130
picosoc
pll
popy_neel
power
private-shuttle
rad-lab-silicon
radio
rdircd
reram
researchers
rf-mmw-design
rios
riscv
sdram
serdes
shuttle
shuttle-precheck
shuttle-status
silicon-photonics
silicon-validation
silicon-validation-private
sky130
sky130-ci
sky130-pv-workshop
sky65
sky90
skywater
sram
stdcelllib
strive
swerv
system-verilog-learners
tapeout-job
tapeout-pakistan
team-awesome
timing-closure
toysram
travis-ci
uvm-learners
vendor-synopsys
venn
verification-be
verification-fe
verilog-learners
vh2v
vhdl
vhdl-learners
vliw
vlsi_verilog_using_opensource_eda
vlsi_verilog_using_opensoure_eda
vlsi-learners-group
vlsi101
waveform-viewers
xls
xschem
xyce
zettascale
Powered by
Title
k

Kunal

10/09/2021, 6:29 AM
VSDOpen2021 Tutorial 3 - Most Exciting - Bandgap Tapeout using Sky130 Now here's a 2-day tutorial which is both for freshers and professionals Why freshers? Bandgap IP design is the most basic one, if you want to learn and excel in Analog Design Why professionals? Non-Analog professionals would love the way the content has been structured, thereby, enabling curious physical designers, STA engineers to see how an IP looks like This time VSDOpen2021 third tutorial invites everyone and anyone who wants to learn about analog IP design from scratch and learn from Bandgap expert Dr. Saroj Rout, Adjunct. Prof. and Asst. Prof. Santunu Sarangi from Silicon Institute of Technology Analog Design Experts - Feel free to join to encourage freshers and look at our internship cum workshop model Overview: This course will be an in-depth introduction to Bandgap Reference (BGR) design and layout using open-source EDA tools (ngspice & Magic) and Google’s Skywater 130nm (SKY130) open-source process design kit (PDK). The course will focus on intuitive understanding of the concepts involved in designing a BGR with real-world specifications and complete hands-on practice using the open-source EDA tools. During the 100 min course, the participant will start with the basic principles of BGR circuit, design, simulate and layout a complete industry-grade BGR – all of that in just 100 mins! Course Curriculum: Day 1 – BGR Theory and Lab setup • Why temperature-independent voltage/current references for ICs • Realization of BGR voltage reference. • Circuit realization of a self-biased BGR and introduction to PTAT/CTAT current source Day 2 – BGR Labs and post-layout simulations • BGR components circuit simulations • Steps to combine BGR sub-circuits and BGR full design simulation • Post Layout simulations • Steps to combine layouts Features - Low cost ($25), 2-day, cloud lab based workshop Timings - You can login at your own convenient time during 24-hrs duration of the workshop and start with lectures/labs at your own pace Workshop Start date - 20th October, 11:59pm IST Workshop End date - 22nd October, 11:59pm IST Registration link- Indian Participants- https://pages.razorpay.com/bandgapinr International Participants- https://pages.razorpay.com/bandgapdollar All the best and happy learning