[Last 5 days] - Exclusive Scripting HDP for freshe...
# general
[Last 5 days] - Exclusive Scripting HDP for freshers/working professionals Believe it or not, scripting and programming has been a pain point for so many years among 80% of freshers and working professionals. It's time to accept and address this problem. Semiconductor industry is all about automation, which makes this field move at such a fast pace. Statistics show that more than 50% job rejections are due to lack of scripting or programming skills. VSD had solved this problem at a small scale, many years ago using TCL as the base language. Now it's time to solve this at much larger scale The way to address this is by looking at existing challenges in opensource world and fixing them using simple scripts. That's where the set of below projects do. All projects below are few of many problem statements which are yet to be addressed and preferred language is Python and Perl, while TCL and C++ are also fine  Interested participants can ask for project details by replying to this email Link for registration - https://www.vlsisystemdesign.com/hdp/ Program start/end date - 2nd January to 13th March, 2022 EDA: 1) DRC Test Generator  {Project Code:DRCTG} 2) Reproducible Builds for OpenLane/TheOpenRoad  {Project Code:RBFO} 3) DRC Correction Engine: Analyze common DRC issues, automatically detect and solve them, integrate the DRC fixing functionality into Magic.    {Project Code:DRCE} 4) Liberty File HTML Report generation with tables and diagrams (Input: .LIB Output: HTML Report), compare 2 different liberty files, report similarities and differences.  {Project Code:LFHR} 5) Visualization of the TLV Flow Library {Project Code - VTFL} 6) Visualization for BaseJump STL {Project Code - VBJS} 7) Visualization for basic digital logic instruction {Project Code - VBDLI} 8) TL-Verilog Editor Modes {Project code - TVEM} 9) EDA Microservices {Project code - EDAM} 10) TL-Verilog Timing Reports {Project code - TVTR}