03/23/2022, 6:52 AM
New Projects on HDP (starting on 27th March) Project Name (Digital design and Synthesis) - Enabling SDC switches in Yosys using SKY130 (Project code - ESSY) Project description - Yosys is an open source logic synthesis tool . Unfortunately there is no support for the regular SDC in Yosys. The aim of the project is to take certain specific constraints in SDC like set_max_delay , set_input_delay , set_input_transition , etc and enable the equivalent features in Yosys by creating custom synthesis scripts. The scope of this project gives a very good exposure to Verilog coding skills, Working of synthesizer, Logic optimization knobs in logic synthesis, Design constraints Project Name (analog design) - High Frequency analog VCO design and implementation using Sky130 (Project code - KCEDVCO) Project description - 200MHz, 400MHz and 915MHz VCO design using Sky130nm - from specification to tapeout Project Name (analog design) - Circuit Design for Capacitive Sensing - Touch/Pressure using SKY130 (Project code - CDCST) Project description - The capacitance to digital converter (CDC) are being extensively used in Biomedical diagnostics, Water and level sensing applications in Industrial sector, MEMS sensor interface and plenty of hobby projects by young engineers. The basics of capacitance sensors, types of cap sensors - Floating and Grounded and their construction is discussed. Learn about the interdigitated Capacitor platform for many Gas Sensing applications and pressure sensing applications. VSD-HDP - link