VSD-HDP Free webinar - Introduction to RISC-V TensorCore Accelerator for Machine Learning Upskilling has become really important in today's era, especially in the midst of fierce talent competition, we need to stay on the edge of technology, to know what's happening latest in industry, and be ready for the future. I myself keep taking many (and quite expensive) courses/workshops to be aware of what's coming next Along with freshers skilling design programs, which is what VSD-HDP specializes in, upskilling is also an integral part of VSD-HDP where industry veterans float latest and cutting edge projects, while working VLSI professionals enroll for the program. We have just completed one cohort of VSD-HDP (many more webinars are lined up), and its result time Presenting free VSD-HDP webinar by one of our participants Ryan, who is 10+ years experienced in Physical implementation and STA, but decided to upskill himself on "RISC-V Tensorcore accelerator for machine learning applications" under the mentorship of Dr. Theodore Omtzigt Building RISC-V tensorcore is a multi-year project and we are very Thankful to Dr. Theodore Omtzigt and Ryan for launching the seeds for the same. In this webinar, you will explore taxonomy of computer architectures, scalar vs vector processing, vector lanes, RISC-V vector extension 1.0 spec (VLEN, VSEW), Vector register file implementation, IP architecture, design specs and Physical design results using OpenLANE and SKY130 Register for the webinar using below link- https://www.vlsisystemdesign.com/vsd-intern-free-webinar/ Webinar schedule - 8th April, 8pm to 8:30pm IST