[PDF] A High-Level Hardware Design Language for Pipelined Processors D Zagieboylo, C Sherk, GE Suh, AC Myers - 2022 Processors are typically designed in Register Transfer Level (RTL) languages, which give designers low-level control over circuit structure and timing. To achieve good performance, processors are pipelined, with multiple instructions executing concurrently in different parts of the circuit. Thus even though processors implement a fundamentally sequential specification (the instruction set architecture), the implementation is highly concurrent. The interactions of multiple instructions … •Cites: ‪The essence of Bluespec: a core language for rule-based …‬