Webinar on SKY130 Performance Optimization - How to improve arithmetic performance? This time, we are getting ready for the future - Performance optimization (PO). All of you might be aware about the kind of tape-outs that VSD has been doing along with Google/SKY130/efabless - we had designs right from mixed-signal SoCs to digital hard-macros to analog IPs. But, at some point of time, VSD is also constantly looking for how to make better chips That's when we bumped with Teo Ene - from Oklahoma State University PhD candidate and Student Researcher @ Google, who is currently a Visiting Student Researcher under Tim Ansell's team at Google. His area of research is on hardware addition, and is aiming to integrate my research into the growing open-source hardware ecosystem. He gave a 40-minute presentation internally, at Google, titled "*The Complexity of Adder Implementations in Hardware*" It's meant to be an introduction to efficient hardware implementations of binary addition for an audience that has a low level of familiarity with hardware implementations. This was a great opportunity for VSD to introduce PO to its interns and marathon/hackathon participants, so next time, they use a similar approach while designing. So very happy to introduce all of you to Teo and welcome all of you for this webinar. Webinar Schedule - 15th April, 8pm to 9pm IST Registration link - https://www.vlsisystemdesign.com/vsd-intern-free-webinar/ All the best and happy learning