https://github.com/arunkmv/perc Posit Enhanced Rocket Chip This is a fork of the Rocket Chip Soc Generator that provides support for posit arithmetic. This has been enabled by utilizing the F and D standard RISC V ISA extensions for floating point arithmetic. The instructions are implemented by the Posit Processing Unit (PPU)/PositFPU which replaces the inhouse IEEE 754 2008 FPU. For more information on posit arithmetic: Posit Hub Unum-computing Google group For more detailed information, please refer to our paper.