# openfpga

Xifan Tang

11/07/2020, 2:45 AM
@User In fact, we have considered this already. That is why we used different flip-flop in configuration circuitry and logic elements. Different from configuration circuitry, the DFFs in logic elements only take 1% of the FPGA area. So using scan-chain DFFs have almost no impact on area but enhance testability a lot.
✔️ 1