Using 25 years of experience designing standard cells for MOSIS, FreePDK, EDA companies, and other academic pursuits, we believe we have created a standard cell library for the SkyWater Technologies 130nm process that is robust and designed efficiently. We also utilize our vast experience in designing SoC chips down to 14nm to incorporate a novel and superior standard-cell library that is designed well. Initial cell designs utilize basic standard-cells for incorporation into a rich feature set of EDA tools. Future designs will have more standard-cells, IEEE 1801 constructs, and other advanced features added to the library. As always, the standard-cell library is always evolving for more features and abilities.