Hi I'm trying to test my project that uses LA probes for most of the design, so I need to use them for configure my design and to read data of my design. I'm trying to use the testing code that I use to verify the project in simulation. My question is that I'm looking to the

reg_laX_oenb

and

reg_laX_iena

and comparing those with the example code of the counter in the caravel board repo, seems to be inverted in the example code. There is any updated documentation of how those registers work?

they got changed from MPW1 to MPW2. Here's some code that works for me https://github.com/efabless/caravel_board/blob/main/firmware_vex/matt_test/pwm_test.c#L88

so, for clarificarion. in the iena (input to the core) 0 means enable and 1 disable

@Ivan Rodriguez did u got clarification of LA probe working as i am also confuse by looking at the counter example in caravel board repo. as my design have logic for active low of oenb

Hi, not a fully clarification, but yes there is some changes with the LA probes. This is the code that make my project to work, and send data using the LA probes and then getting the result throw the GPIO. For reference this is the front end of my ASIC that uses the oenb for enable or disable the clock. https://github.com/jaquerinte/caravel_radiation_harden/blob/43d94ef2a892d111ec2653c1c3dd7191fec378a0/verilog/rtl/user_proj_example.v#L102