before I get involved in another red herring, does anyone know if the logic analyser is known-broken or known-working on the mpw2 parts? (unfortunately my debugging options for these chips are a bit limited)

The parts of the logic analyzer that I have tested (mainly on the "user project example" counter that we put on silicon) worked just fine. I would not expect any issues because it's all just registered values; no particular timing involved other than the timing that's inside the processor, which was all handled well.

Yep, I was driving the wrong IO on my design, basic LA inputs seem to work fine