RISC-V committee The Posit Standard (2022) was ratified a year ago and you can find it on posithub.org. Check out PERCIVAL and CLARINET as example implementations of posit format on RISC-V. https://posithub.org/docs/RISC-V/RISC-V.htm The extension of RISC-V to support 32-bit posits (2-bit es exponent value) generally should follow the form of the “F” Standard Extension for Single-Precision Floating-Point. Some features map perfectly; some can be eliminated as unnecessary; a few functions need to be added, such as the quire operations. The following goes through Chapter 6 of the RISC-V Instruction Set Manual and comments on each section.