https://open-source-silicon.dev logo
Channels
aa
abcc
activity
adiabatonauts
analog-design
announce
announcements
b2aws
b2aws-tutorial
bag
basebands
beagleboard
bluetooth
board-respin
cadence-genus
cadence-innovus
cadence-spectre
cadence-virtuoso
caravan
caravel
caravel-board
chilechipmakers
chip-yard
chipignite
chipignite2206q_stanford_bringup
chisel
coalition-for-digital-environmental-sustainability
community_denmark_dtu
containers
courses
design-review
design-services
dffram
digital-design
digital-electronics-learners
discord-mods
dynamic-power-estimation
efabless
electric
events
fasoc
fault
foss-asic-tools
fossee-iitb-esim
fossee-iitb-google-sky130
fpga
funding
fuserisc
general
generative-ai-silicon-challenge
genius-vlsi
gf180
gf180mcu
hardware-beginners
help-
ieee-sscs-cac-23
ieee-sscs-dc-21q3
ieee-sscs-dc-22
ieee-sscs-dc-23
ihp-sg13g2
images
infiniband
j-core
japan-region
junk
klayout
latam_vlsi
layouteditor
lvs
lvs-analysis
magic
magical
maker-projects
maker-zone
microwatt
mpw-2-silicon
mpw-one-clean-short
mpw-one-silicon
neuro-mem
nydesign
open_pdks
open-pdk
openadiabaticlogic
openfpga
openhighqualityresonators
openlane
openlane_cloudrunner
openlane-development
openocd
openpositarithmetic
openpower
openram
openroad
opentitan
osu
pa-test-chip
paracells
pd-openlane-and-sky130
picosoc
pll
popy_neel
power
private-shuttle
rad-lab-silicon
radio
rdircd
reram
researchers
rf-mmw-design
rios
riscv
sdram
serdes
shuttle
shuttle-precheck
shuttle-status
silicon-photonics
silicon-validation
silicon-validation-private
sky130
sky130-ci
sky130-pv-workshop
sky65
sky90
skywater
sram
stdcelllib
strive
swerv
system-verilog-learners
tapeout-job
tapeout-pakistan
team-awesome
timing-closure
toysram
travis-ci
uvm-learners
vendor-synopsys
venn
verification-be
verification-fe
verilog-learners
vh2v
vhdl
vhdl-learners
vliw
vlsi_verilog_using_opensource_eda
vlsi_verilog_using_opensoure_eda
vlsi-learners-group
vlsi101
waveform-viewers
xls
xschem
xyce
zettascale
Powered by
Title
w

wisla morais

02/02/2023, 2:18 AM
Hello everyone, I have a specific question, but I know that there are people with experience here. I'm testing an envelope detector project with Mosfet with Xschem and Ngspice. Considering the conversion gain definition *(20*log(rms(Vout)/rms(Vin)))*, I created a scheme with a sinusoidal source at the input with frequency of 2.4GHz and amplitude varying with
foreach
loop. So, using transient analysis (
tran 0.41n 3u 0 4p
), I used
meas tran dorms RMS v(do) from=0 to=3u
;
meas tran dinrms RMS v(din) from=0 to=3u
and
let cg = dorms/dinrms
for each amplitude value. I would like to know if this simulation schematic that I created makes sense and its the best way for obtain this simulation.
s

Stefan Schippers

02/02/2023, 7:06 PM
this query reaches a complexity level where to give a tangible help it is probably better to attach the schematic file(s) :-)
w

wisla morais

02/02/2023, 8:42 PM
Right, sir. These are the schematic files. As I needed the gain depending on the input, I used a loop and the simulation takes time.
s

Stefan Schippers

02/02/2023, 8:43 PM
Thank you , looking at it...
I have refactored a bit your test schematic to remove absolute paths in the symbol instances. the attached
tar.gz
file creates a
conv_detector
directory. Start xschem inside this directory. I think your approach is correct. This is not a small signal analysis so no .AC can be used. I have made some mesurements in xschem and the values for
dinrms
,
dorms
and
cg
confirm the printed values. Image shows the results for the highest
amp
param value.
I have not understood exactly what is the purpose of the circuit. For very low input amplitudes the circuit operates linearly (AC coupler + LP filter) and filtered
do
goes quickly to zero. Anyway i am not a UHF expert so I might just be ignorant :-)
🙌🏼 1
w

wisla morais

02/03/2023, 2:39 AM
I appreciate your help @Stefan Schippers. I know this was a very specific query. Knowing that it made no sense to do the AC simulation, I was having doubts about this schematic that I used, with the aim of getting the output DC voltage for each input value. This circuit detects the envelope of an ASK modulated signal. Thank you very very much. 😃