Is there further information on what the LEDs indicate? While it is doing the IO config testing, the...

Matthew Guthaus

02/01/2023, 9:35 PM

Is there further information on what the LEDs indicate? While it is doing the IO config testing, the red LED is solid and it alternates between green and blue. I'm not sure when "the test concludes" to watch the result LEDs.

Tim Edwards

02/01/2023, 9:48 PM

I haven't been paying any attention to the Nucleo board LEDs, but they're set in the micropython code, so I can probably figure out what they're supposed to mean.

Matthew Guthaus

02/01/2023, 9:48 PM

Oh, which LEDs does it refer to?

Matthew Guthaus

02/01/2023, 9:48 PM

(I actually posted an issue with this... )

Matthew Guthaus

02/01/2023, 9:49 PM

Hrm, maybe I didn't. i think it was a comment somewhere

Tim Edwards

02/01/2023, 9:50 PM

I see

io_config.py

defining

led_blue = Led("B7")

and similar for the red and green LEDs. Then there are calls to, e.g.,

led_green.blink(short=..., long=...)

Matthew Guthaus

02/01/2023, 9:51 PM

Is there a picture of the board with the LEDs somewhere? I see schematic files...

Matthew Guthaus

02/01/2023, 9:52 PM

Of the shield

Tim Edwards

02/01/2023, 9:54 PM

So I see: (1) Beginning GPIO configuration test: green blinks short=3, long=4 (2) First chain complete: green blinks short=3, long=2 (3) If both pass, green blinks short=2, long=4 (3b) If only the low chain passes, red blinks short=2, green blinks long=2 (3c) If only the high chain passes, red blinks short=2, green blinks long=4 (3d) If neither chain passes, red blinks short=2, long=4

Tim Edwards

02/01/2023, 9:54 PM

This seems rather arcane to me. I just run the test from the terminal and watch the terminal diagnostic output.

Tim Edwards

02/01/2023, 9:58 PM

The caravel development board has only two LEDs on it (both red). The one at the bottom of the board is the power indicator. The one on the side is connected to the single GPIO pin that we have that is connected to the management SoC and is not configurable like the others (originally intended to power the LDOs for the user project, but never been used that way). The program running on the Caravel processor can set the GPIO output high or low to turn that LED off or on, respectively.

Matthew Guthaus

02/01/2023, 9:58 PM

So are they talking about the nucleo LEDs that have the results?

Matthew Guthaus

02/01/2023, 9:59 PM

(I was unsure if the caravel dev board had some LEDs that were never going on... I've been scouring the design for it.)

Tim Edwards

02/01/2023, 10:04 PM

Yes, if there is a reference to red/green/blue LEDs then they are the ones on the Nucleo board in the center right next to the slots that separate the STLink module.

✅ 1

Tim Edwards

02/08/2023, 9:34 PM

Any updates on testing? We have made a number of fixes to the software and firmware and are now getting reasonable results where most designers are able to find at least one or two parts that can be fully configured. If you need help with the bring-up, we can get on a zoom call.

Matthew Guthaus

02/08/2023, 9:39 PM

https://open-source-silicon.slack.com/archives/C03UVJCTR8U/p1675879494704699?thread_ts=1675849758.099029&cid=C03UVJCTR8U

Matthew Guthaus

02/08/2023, 9:39 PM

I need to try a few more parts.

Tim Edwards

02/08/2023, 9:41 PM

@jeffdi: Do you have any B3 parts in hand (Matt Guthaus's project)?

Matthew Guthaus

02/08/2023, 9:43 PM

proppy got pins 0-15 to work on a B3

Matthew Guthaus

02/08/2023, 9:43 PM

so it isn't dead at least

Matthew Guthaus

02/08/2023, 9:44 PM

my spring pin problem is definitely due to JP6 intefering

Matthew Guthaus

02/08/2023, 9:51 PM

IT'S ALIVE

Copy code

::::: flashing Caravel :::::
gpio[01] - H_INDEPENDENT >> Failed
::::: flashing Caravel :::::

My JP6 was mashing a gnd springpin into the CARAVEL_CSB spring pin from the bottom side of the board

Matthew Guthaus

02/08/2023, 9:52 PM

If I put the nucleo board on halfway it gets further. Not far enough and I was getting a Winbond SRAM not found error again.

Tim Edwards

02/08/2023, 9:59 PM

That's a known issue and since yesterday has been documented pretty thoroughly. The headers that we got the assembly house to install on the Nucleo boards are a bit too short. I have advised bending down the two headers on the Nucleo that get in the way of the flexi-pins (but I haven't tried it myself---Jeff sent me an unassembled Nucleo with some headers that he had lying around, and they happen to be longer headers, so I couldn't even see the problem that all the designers were having).

Matthew Guthaus

02/08/2023, 9:59 PM

It wasn't documented for 2 weeks...

Matthew Guthaus

02/08/2023, 9:59 PM

shrug

Matthew Guthaus

02/08/2023, 9:59 PM

Where is it documented?

Matthew Guthaus

02/08/2023, 10:00 PM

(I'm not even sure where to look for updates now...)

Matthew Guthaus

02/08/2023, 10:02 PM

At first, i thought this was just preventing the pins from connecting to the daughter board. i didn't realize it was causing a short underneath.

Tim Edwards

02/08/2023, 10:02 PM

Yeah, we had supply-chain issues with the Nucleo boards and I didn't even get one to test with until recently. Various things weren't documented until recently. You should be able to find everything now in the README of the

caravel_board

project on github.

Tim Edwards

02/08/2023, 10:03 PM

All recent updates have been merged into the

main

branch.

Kavya Sreedhar

02/27/2023, 1:24 AM

@Matthew Guthaus @Tim Edwards Is there any indication on how far we need to push the nucleo board down to avoid the winbond SRAM error? I am getting the Winbond SRAM not found error though it looks like

make F746ZG

worked (except for the copy, for which I then did

make copy2

which looked good, the files are there at

/Volumes/PYBFLASH*/*

). I am using new usb cables and I see LEDs light up on both boards. I have included what the terminal output looks like for these commands in the thread. Do you have any suggestions on other things I could try? thanks for the help!

Kavya Sreedhar

02/27/2023, 1:24 AM

Copy code

(caravel) kavya@Kavyas-MacBook-Pro nucleo % make F746ZG
mpy-cross flash.py
mpy-cross io_config.py
mpy-cross gpio_config_builder.py
mpy-cross i2c.py
mpy-cross nucleo_api.py
mpy-cross boot.py
st-flash --connect-under-reset --format ihex write F746ZG_firmware.hex
st-flash 1.7.0
2023-02-26T17:16:14 INFO common.c: F7xx: 320 KiB SRAM, 1024 KiB flash in at least 2 KiB pages.
2023-02-26T17:16:14 INFO common.c: Attempting to write 579808 (0x8d8e0) bytes to stm32 address: 134217728 (0x8000000)
EraseFlash - Sector:0x0 Size:0x8000 2023-02-26T17:16:14 INFO common.c: Flash page at addr: 0x08000000 erased
EraseFlash - Sector:0x1 Size:0x8000 2023-02-26T17:16:15 INFO common.c: Flash page at addr: 0x08008000 erased
EraseFlash - Sector:0x2 Size:0x8000 2023-02-26T17:16:15 INFO common.c: Flash page at addr: 0x08010000 erased
EraseFlash - Sector:0x3 Size:0x8000 2023-02-26T17:16:15 INFO common.c: Flash page at addr: 0x08018000 erased
EraseFlash - Sector:0x4 Size:0x20000 2023-02-26T17:16:17 INFO common.c: Flash page at addr: 0x08020000 erased
EraseFlash - Sector:0x5 Size:0x40000 2023-02-26T17:16:18 INFO common.c: Flash page at addr: 0x08040000 erased
EraseFlash - Sector:0x6 Size:0x40000 2023-02-26T17:16:20 INFO common.c: Flash page at addr: 0x08080000 erased
2023-02-26T17:16:20 INFO common.c: Finished erasing 7 pages of 262144 (0x40000) bytes
2023-02-26T17:16:20 INFO common.c: Starting Flash write for F2/F4/F7/L4
2023-02-26T17:16:20 INFO flash_loader.c: Successfully loaded flash loader in sram
2023-02-26T17:16:20 INFO flash_loader.c: Clear DFSR
2023-02-26T17:16:20 INFO common.c: enabling 32-bit flash writes
2023-02-26T17:16:28 INFO common.c: Starting verification of write complete
2023-02-26T17:16:34 INFO common.c: Flash written and verified! jolly good!
sleep 5
make F746ZG-copy
mpy-cross flash.py
make[1]: mpy-cross: No such file or directory
make[1]: *** [compile] Error 1
make: *** [F746ZG] Error 2
(caravel) kavya@Kavyas-MacBook-Pro nucleo % make copy2
mpy-cross flash.py
mpy-cross io_config.py
mpy-cross gpio_config_builder.py
mpy-cross i2c.py
mpy-cross nucleo_api.py
mpy-cross boot.py
cp flash.mpy i2c.mpy gpio_config_builder.mpy nucleo_api.mpy io_config.mpy //Volumes/PYBFLASH/
cp config_io_o.hex //Volumes/PYBFLASH/
cp main.py //Volumes/PYBFLASH/
sync
ls //Volumes/PYBFLASH/
README.txt		gpio_config_builder.mpy	nucleo_api.mpy
boot.py			i2c.mpy			pybcdc.inf
config_io_o.hex		io_config.mpy
flash.mpy		main.py
(caravel) kavya@Kavyas-MacBook-Pro nucleo % make repl
mpremote connect /dev/cu.usbmodem111103 repl
Connected to MicroPython at /dev/cu.usbmodem111103
Use Ctrl-] to exit this shell

>>> import io_config
>>> io_config.run()
 
===================================================================
io_config -- version 1.2.1
voltage = 1.60, analog = False
===================================================================
 
===================================================================
== Beginning IO configuration test.  Testing LOW IO chain...     ==
===================================================================
 
::::: flashing Caravel :::::
Winbond SRAM not found

Matthew Guthaus

02/27/2023, 1:32 AM

I did it until it felt a little resistance. It doesn't come off easily. Here's a photo

Kavya Sreedhar

02/27/2023, 1:39 AM

thank you so much, the picture really helped! that was the issue, I had not pushed it down far enough!

👍 1

Kavya Sreedhar

02/27/2023, 1:39 AM

Copy code

gpio[01] - H_INDEPENDENT >> Passed
gpio[02] - H_INDEPENDENT >> Passed
gpio[03] - H_INDEPENDENT >> Passed
gpio[04] - H_INDEPENDENT >> Passed
gpio[05] - H_INDEPENDENT >> Passed
gpio[06] - H_INDEPENDENT >> Failed

Kavya Sreedhar

02/27/2023, 1:39 AM

I’m seeing this now

Kavya Sreedhar

02/27/2023, 1:42 AM

looking through the thread, it seems like these issues might be due to hold time violations? and we might want to try lower voltages to see if we can resolve some of the issues?

Matthew Guthaus

02/27/2023, 1:50 AM

I used 1.45V for most of my parts which maximized the number of working IOs

👍 2

Kavya Sreedhar

02/27/2023, 1:51 AM

got it, I will try that. thank you!

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