Hi @Stefan Schippers, I'm trying to perform a post layout simulation on a large circuit composed from a series of subcircuits. To test this, I understand that the large circuit has to be made into a symbol and set as "primative". Treating the large circuit as the top, do I have to set all the subcircuit symbol properties as primative or only the top symbol is required?

If the large circuit is the top level you don't need to create a symbol for it. load the top level schematic and create an LVS netlist (press Netlist button, after setting

Simulation-> LVS netlist: top level is a subckt

). Subcircuits are placed in the top level as symbols and these symbols have the type attribute set as

subcircuit

.

type=primitive

is used for terminal symbols (transistors, resistor etc) that do not have a schematic associated.

Got it. I think I'm still confused with setting up parasitic extractions and trying to get it simulated properly in xschem. I think I will move my questions to the magic channel to keep things tidy.