then we also had to work around the hold violation...
# mpw-one-silicon
m
then we also had to work around the hold violations in the IOs,
t
I think it has been established that the MPW-1 chips have a hold violation between every GPIO on the right hand side (GPIO 0 to 18) and no issues on the left hand side (GPIO 19 to 37). However, other hold violations throughout the design can cause issues like a failure to trigger the GPIO configuration load, which renders the GPIO useless. I had a handful of MPW-1 chips on my desk and every one of them failed to trigger a GPIO configuration load. Other people had some success, so I estimate that about 1 in 5 chips have a chance of working. Even then, none of them will work at the standard 1.8V VCCD voltage. I was able to get the most function out of the chip at lower voltages, but it varied from chip to chip and could be as low as 1.5V or as high as 1.75V.
y
Thanks alot for this insight and taking the time to retest them! This gives a great idea of what to look out for. And definitely looking foward to the MPW2 chips for testing