Your extracted netlist shows 6 lines that are nmos. (4 of those are parallel giving a total of 10 nmos). So one nmos is not being extracted. Looking at the

CCP_NMOS

you can notice missing

diff

. magic is very picking about device recognition layers all being at the same hierarchy. If you're running extraction from gds, you can flatten the subcells cells first using

gds flatglob <cellname>

Thank you very much, Mitch! It's very helpful!

Your schematic

DCDC_XSW_NMOS

subcircuit has 4 nfets, each with width of 0.42um.

.subckt DCDC_XSW_NMOS VNB clk clkb vIN vOUT0 vOUT1
x0 int_sw0 int_sw1 vIN VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
x1 int_sw1 int_sw0 vIN VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
x2 vOUT0 int_sw0 vIN VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
x3 vOUT1 int_sw1 vIN VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
x4 clkb int_sw0 clkb clkb sky130_fd_pr__pfet_01v8 w=2100000u l=2100000u
x5 clk int_sw1 clk clk sky130_fd_pr__pfet_01v8 w=2100000u l=2100000u
.ends DCDC_XSW_NMOS

Your corresponding layout has 6 nfets, with 2 sets of parallel nfets (M=2). netgen reduces the parallel devices by adding

w

. You can change

w

in

x2

and

x3

from 420000u to 840000u.

OK, I see, thank you so much!