If there are unused power and ground nets, then I suggest removing them from the netlist and layout. The netlist says these nets should be connected between

wrapper_sha1

and

wrapper_fibonacci

, but apparently they aren't connected in the layout. Can you verify?

is something we can fix from RTL? because i don't have control with netlist during run time

If your

wrapper_sha1

and

wrapper_fibonacci

macros actually have

vdda1

,

vssa1

etc. ports, maybe you can put those in the

FP_PDN_MACRO_HOOKS

set ::env(FP_PDN_MACRO_HOOKS) "\
	wrapper_sha1 vccd1 vssd1 vccd1 vssd1,
	wrapper_sha1 vccd2 vssd2 vccd2 vssd2,
	wrapper_sha1 vdda1 vssa1 vdda1 vssa1,
	wrapper_sha1 vdda2 vssa2 vdda2 vssa2,
	wrapper_fibonacci vccd1 vssd1 vccd1 vssd1,
	wrapper_fibonacci vccd2 vssd2 vccd2 vssd2,
	wrapper_fibonacci vdda1 vssa1 vdda1 vssa1,
	wrapper_fibonacci vdda2 vssa2 vdda2 vssa2"

Thanks @Mitch Bailey LVS passed. Now there was Magic DRC error. [ERROR]: Total Number of violations is 219527

----------------------------------------
Metal1 spacing < 0.14um (met1.2)
----------------------------------------
 509.590um 604.000um 629.120um 604.080um
 509.590um 604.140um 629.120um 604.220um

that will almost certainly be because of the SRAM macro block