to answer my own question for documentation purposes: The SPI flash emulation doesn't implement write. The test bench writes commands to change mode. If you want to write to the SPI flash you would need to change spiflash.v in the VexRisc-v test folder. I don't know if that's the only barrier to writing or not.

The main complication is that the SPI flash controller on the RISC-V will be running stream access, so any write cycle will have to end the read stream and force the flash controller to start the next SPI read instruction with a full command and address. It would be a great feature to have, to be able to write back to the SPI flash, or some part of it, but a bit complicated to implement.

Thank you! I'll post an update if I make progress. I may start out adding code to FreeRTOS's heap implementation to explicitly switch modes so I can test the flash changes independently of the memory mapping.

Yes, please keep me posted. If you have a working flash SPI controller that can do SPI writes, that would be something I would like to add to the existing SoC design. Extra bonus points if you can make the SPI flash controller switch between single, dual, and quad data modes! : )