I am using docker for the tool: Xschem, but I am not getting the waveform. Could you please help. (Also how to save the circuit (.sch file), since saved file (.sch) getting deleted automatically once I come out of the docker.) @Harald Pretl

Inside the Docker you should work in the directory

/foss/designs

which is mapped in your host system wherever you specify (default is

…/eda/designs

). Generally, the filesystem of most locations in Docker is read-only, this is to protect it. But the

/foss/designs

is read/writeable.

Thank you for your reply, I saved my .sch file in /foss/designs when i come out of the docker and after some time run the docker again, i searched for the file in /foss/designs, it was not there so cant I save the .sch file in host OS so that I can use same circuit again?

@Georg Zachl can you please help on the design folder issue. For plotting in xschem @Stefan Schippers is the right person to ask.

@Kamta Kesharwani Have you installed gaw ?

If I am using docker, do I need to install Gaw?

Don't know about that.

https://github.com/hpretl/iic-osic-tools/tree/main I pulled this docker image.

I can see gaw in the installed tools list

Yes, I did that way also but was unable to get waveform.

you can try to run gaw offline manually from the terminal, like: gaw /your/spice/file.raw

Hey @Kamta Kesharwani, how have you started the container? Using the start script?

@Georg Zachl In ubuntu terminal I run the code "sudo docker run hpretl/iic-osic-tool". then i connected via VNC viewer, after that there in the terminal i just wrote xschem and hit enter.

@Kamta Kesharwani first of all check that the <circuit_name>.raw file is existing in the directory where netlist and simulation is run.

Oh, then I know what the issue is! Look at the readme in the github repository: https://github.com/hpretl/iic-osic-tools/blob/main/README.md You are missing the mounting of the /foss/designs directory into the docker container. That is probably, why it does not work as expected. We have start-scripts in the repo, that do the work for you!

Thank you so much @Georg Zachl @Stefan Schippers I will be looking into that. Also parallelly I have installed xschem, ngspice, and installing open_pdks from http://opencircuitdesign.com/open_pdks/index.html I hope all will go fine.

xschem, ngspice and open_pdks are all installed in the docker container. No further install required!

@Harald Pretl Thank you so much. now I can save my all files by mounting of the /foss/designs directory into the docker container, when I use docker for xschem . I have one more question , can I go with docker for my entire circuit design?

@Kamta Kesharwani “I have one more question , can I go with docker for my entire circuit design?” Not sure what you require for that, but ngspice, magic, netgen, etc. are all installed, see here for a full list: https://github.com/hpretl/iic-osic-tools/blob/main/README.md

@Stefan Schippers Sorry to disturb you again, Could you please let me know why i am getting this error and how I can correct? This is the error I got when i simulate the circuit. Failed: sh -c {cd /headless/.xschem/simulations; ngspice -b -r "/headless/.xschem/simulations/my_inv.raw" -o "/headless/.xschem/simulations/my_inv.out" "/headless/.xschem/simulations/my_inv.spice"} stderr: child process exited abnormally data: ****** ** ngspice-37 : Circuit level simulation program ** The U. C. Berkeley CAD Group ** Copyright 1985-1994, Regents of the University of California. ** Copyright 2001-2022, The ngspice team. ** Please get your ngspice manual from http://ngspice.sourceforge.net/docs.html ** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html ** Creation Date: Thu May 26 094750 UTC 2022 ****** child process exited abnormally data: ****** Batch mode Simulation output goes to rawfile: /headless/.xschem/simulations/my_inv.raw Comments and warnings go to log-file: /headless/.xschem/simulations/my_inv.out

@Kamta Kesharwani as explained in the messages above check the log file

/headless/.xschem/simulations/my_inv.out

for the reason ngspice exited with an error.

@Stefan Schippers @Georg Zachl Sir I am using docker for tools like xschem.... where is the model files (like TT_MODEL, FF_MODEL ...etc) that we can use for designing the inverter ?

@Kamta Kesharwani if you are using a docker container you need to ask to the docker creator. He knows where all files are located. You probably need to set up a PDK_ROOT variable before starting xschem. But this is my speculation, you need to ask to the docker maintainer.

Okay, Thank you

PDK_ROOT is set in our container per default, so you can just read it (by executing "printenv PDK_ROOT"). But in general, the PDK (or PDKs in the future probably) are located in "/foss/pdk" in our container.

@Georg Zachl Sir i did not find such file, could you please help me .... here is the screen shot.

look into the examples. All files are there. On the screenshot you sent: left is the /foss/pdk/sky130A .... where all the PDK files are. Right you see the contents of the selected directory. On the bottom is the up button to navitage to the super directory.

@Georg Zachl Thank you so much , I got all the library files. Thank you again for your time.

There is an inverter example on the left in the example project. This is an ring-oszillator but you can traverse into one of the inverters and then you see the actually used transistors. AFAIK the pmos4 and nmos4 are just general spice models, not specific to the PDK. Those are then called like nfet_01v8_lvt (the 1.8V low Vt nfet, which is used for the inverter example).

@Kamta Kesharwani you need to use FET symbols in library

sky130_fd_pr

, as George said. nmos4 and pmos4 are generic mos devices, if you want to use those you need to provide yourself models for these. These generic symbols are mostly used for discrete devices (like Power MOSFEFS etc).

Okay, Thank you

@Kamta Kesharwani set transistor length to 0.15 instead of 0.13. Although it is a 130nm process the drawn minimum dimension for length is 0.15

@Stefan Schippers So sir it means if i have to scale down technology from 180nm to 130 nm , should I scale it to 150nm?

@Kamta Kesharwani yes from my understanding 150nm is the minimum length for generic analog/logic circuitry. Lower lenghts are allowed in special structures, like SRAM cells.

Okay, thank you sir

https://skywater-pdk.readthedocs.io/en/main/ It is hard to find but everything is in this documentation.

Thank you sir, the link is very helpful for me to navigate.