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Hi , iam trying to write into and read from a memory array created in user space. I ran the wb_ port...
# caravel
b
Hi , iam trying to write into and read from a memory array created in user space. I ran the wb_ port test bench without modifying. I get the following output. But how shall I set specific values to wbs_ adr_i and wbs_data_i in the testbench?
m
you also need to use the correct address range and enable wishbone - see the FAQ
b
how to set mprj_io as standard input?
m
reg_mprj_io_0 = GPIO_MODE_USER_STD_INPUT_NOPULL
to set the first io
b
What could be the reason for this error?
m
some problem in your verilog testbench it looks like
in the future could you take screenshots and post them? badly focussed, half cropped images don't help the debug process
b
sure
🙌 1
@Matt Venn is it ok to change the width of wbs_adr_i in the user wrapper?
m
Depends, i would leave it at 32. If you get it wrong then you wont be able to address your peripheral
b
is it a good idea to change the width of address bus inside the user project keeping what is in the wrapper same?
m
it could be. You would save on registers and your design could be smaller.
b
@Matt Venn Does the chip fabricated through chipIgnite program come as embedded in a board? if i connect the inputs and outputs of the user module to GPIO and no logic analyzer facility is used, how will i access GPIO once the chip is fabricated?
m
Board is being updated here #caravel-board
I think you get 3 boards and the rest chips
Firmware will configure the gpio
Ideally you would have simulated this before tapeout
In case you wired it up wrong
b
how is data loaded and retrieved through gpio pins once the chip is fabricated, provided all the pin configuration is specified in the firmwire?
m
What data? I'm not sure I understand. Can you explain what is your aim? Maybe that will help me
b
iam confused about how to use the chip on the board. How is the gpio interfaced to board ?
m
The chip is soldered to the board. So you can use the gpio by by connecting a scope or whatever to the pcb
b
Hi, could you tell what is the reason as to why the simulation takes long time and got stuck at ' report power' while trying to harden user module?
m
can you make 2 new posts for these? maybe the simulation one in #caravel and the hardening one in #openlane
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