is there guidance for switching from iverilog to xyce? Should I just follow the guide here: https://xyce.sandia.gov/documentation-tutorials/building-guide/

The building guide is if you want to build Xyce from source. That can be desirable if you need a feature that hasn’t been included in a formal code release yet. We do code releases every 6 months. We are on the verge of a new release, which will be Xyce 7.5. If you don’t want to build from source, another option is to use one of our binary installers. They are available for 3 operating systems: RHEL7 (linux), MacOS and Windows. For Windows, it is serial-only. For the other 2 you can do either serial or parallel.

I'm wanting to switch from iverilog to xyce because I've heard it's faster. Happy to install a binary. But do the older versions work with the sky130 pdk spice models?

Regarding converting from verilog to Xyce, that’s an extraction step that happens upstream from Xyce in the tool flow. For purely digital designs, verilog is always going to be faster than an “analog” style simulator, even a parallel one like Xyce.

sorry I'm not being clear

That’s OK; let me know if I mis-interpreted your question(s). I’m happy to answer more.

I have a digital design that I can simulate, but it's only an approximation of what will happen because it involves a ring oscillator

Ah.

For a mixed signal design (or analog) then SPICE and/or Xyce becomes more useful and/or important.

yes. So now I have run the design through openlane and got the spice

I see, that makes sense. How big is the ring oscillator?

but now with the registers and counters in place, it is not finishing (only left it one hour so far), but just a 11 inverter ring osc takes ngspice about 4 mins

The netlist language of Xyce is not 100% the same as ngspice, but it is very similar. Most of the work I’ve done in the past 6 months to make Xyce work with Sky130 has been to add features to the Xyce parser to get them closer.

that would be very appreciated

In general, Xyce parses the Sky130 files a lot faster than ngspice. For the actual simulation, they probably have similar runtimes for small circuits. Xyce’s parallelism is mostly helpful when the circuits get large. There has to be enough work for each processor to be fully utilized. Otherwise the additional overhead from parallel is more expensive than the benefit of parallel.

so I need the parallel version?

So, all of this is to say that for your circuit we might be faster, but that isn’t 100% guaranteed. But like I said I’m happy to help. I’m interested to see the result.

thanks!