From 2-input mux to RISC-V to FPGA - All in 2 weeks Ever wondered what all you can do in 2-weeks? You can build your RISC-V CPU core. You can interface your RISC-V CPU with an analog block and test on the Xilinx FPGA board. You can use the same RISC-V core and test on OpenFPGA fabric. And you can design your FPGA fabric, thereby, your FPGA board. This image speaks a lot about the content Participants do ask what are the prerequisites to attend this workshop. Our answer - If you know how 2-input mux works, you are eligible to join this workshop. If you know how a 2-input NAND/NOR gate works, you are eligible to attend this workshop. If you know only how NOT gate works, that itself should be fine to attend this workshop. In hindsight, this workshop expects you to empty your mind (except for digital logic) before joining because the industry has evolved so much outside college gates and we want to give you a real look at the industry. The workshop is all about research, design and implementation under strict timelines Thank You so much, Dr Naveed and Dr Shrikanth from OSFPGA Foundation for providing the workshops at more than 55% discount pricing to enable all interested participants from nook and corner of the world. Here's the registration link (which closes in 4-days): https://osfpga.org/osfpga-training/ All the best and happy learning

Doesn't feel appropriate to post commercial marketing content here