<@U01G2N363B8>
# mpw-one-silicon
m
j
Thanks! Will compare within 9 hours
m
If you send me your binary i can also try with that
j
The binary under test is the same vdd-scan. There are some obvious differences in the waveforms. We will start with slowing the clock and share the results.
@User Can you share the output from vdd-scan operation?
m
As in the sram read writes while i run vddscan?
j
The same view: SPI from flash emulation. It looks like our boards are resetting during the program reads. A couple taps around successful vdd-scan would be helpful.
m
Taps?
j
for n(0) passing --> good vdd: n(-1) and n(0) n(1) would be helpful, too.
m
sorry, still don't understand
what is n(-1) n(1), this is nomenclature I've not seen before
Also, I don't know why but I'm no longer able to do vdd scans
I just get 230 as the number of reads no matter the chip or supply voltage
j
With more experimentation, we were able to get a reliable sequence for loading an image. The io-mapper runs 80% with a lower voltage compared with vdd-scan. When it hangs, a vdd ramp is needed to recover it.
In terms of io-mapper, does MM, MM+-1 result imply that user mode is not accessilbe?