It took me a while to figure that out; my eventual solution to it was to put that part in its own

code_shown

block without the

format=tcleval()

setting. I assume that the

tcleval

does not like the brackets, but I couldn't figure out how to backslash-escape them or whatever to make them invisible to the Tcl interpreter. Removing it entirely from the Tcl evaluation was the only way I found that would get it to work.

Doesn't quite work for me ... an extra

code_shown

block prevents the simulation from crashing, but

plot V(io_out[11]) V(io_out[12]) V(io_out[15]) V(io_out[16])
+ V(gpio_analog[3]) V(gpio_analog[7])

still results in

Error: bad v() syntax

Are you making some undocumented implicit assumptions how to configure the

plot

instruction in ngspice?

Actually I'm a bit surprised that there wasn't more. I think there will still be issues down the line, as the existing layout shorts together several power domains without using metal resistors to keep the nets independent from each other, leading to eventual LVS issues. Also, I know that precheck fails for analog projects due to an unfortunate implementation of a rule that is supposed to check that the user area power is connected to the padframe power (the implementation happens to work for digital projects) (also the issue is currently under investigation and hopefully will be fixed soon).

I'm sweeping one minefield at a time ...

magic

is next.