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It is confusing here. I am not sure which truth table to follow when control the I/O through the `io...
# caravel
x
It is confusing here. I am not sure which truth table to follow when control the I/O through the 
io_oeb
signals of user project. Should we follow the truth table on manual page 5 of 
reg_gpio_ena
where (0 = output, 1 = input) or the truth table on manual page 20 where (1 = output, 0 = input) ?
💯 4
t
"reg_gpio_ena" and other such signals are specifically for one pin that belongs to the management SoC; this is not the same as the GPIO pins in the user area. So, no, do not use page 5 of the manual for any guidance on the user area GPIO pins.
x
Thanks!
• @Tim Edwards Sorry to bother you again. I am double checking the Caravel manual. I found a truth table on page 21 saying 
0 = output, 1= input
 . Currently, I feel lost again which one to follow. My understanding is the 
oeb
  is an active low signal to enable output. So it means 
0 = output, 1= input
 ? I am developing an FPGA IP and the FPGA I/O should output correct 
oeb
signals to drive the user GPIOs. That is why I am concerned here. I appreciate your help very much.
t
On page 21, I see only 
bit 1 = output disable (0 = output enabled, 1 = output disabled) (default 1)
.
x
Yes. That is the one I was reading. Does it mean • when 
oeb = 0
the user GPIO is in output mode, • when 
oeb = 1
the user GPIO is in input mode?
That is why I wrote 
0 = output, 1= input
t
No. The GPIO can be configured as an input or a bidirectional pin. When it is configured as bidirectional, then the output is enabled or disabled with the 
oeb
line. If you want the pad to be output only, then tie 
oeb
low. Otherwise, use 
oeb
to enable the output or leave it tri-stated. In either case, the input is enabled unless specifically disabled by the "input disable" bit.
x
O.K. It means that an FPGA IP should only send either 
0
or 
Z
signals to 
oeb
ports, right? If an FPGA I/O is set to be input, we should set 
oeb
to 
Z
?
t
No. If you want an I/O to be input, then set 
oeb
to 
1
(output disabled). If 
oeb
is undriven, then the behavior of the pad will be undefined.
j
@Tim Edwards I am a bit confused. Does the GPIO controller have the ability to overwrite configuration? We can set the default behavior of io_oeb[x] in the user_project_wrapper, but is this fixed or just the reset state?
r
You can route logic to oeb to dynamically enable / disable output for the pin
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