I want to integrate a logo into the

Caravel

user area, does someone know how I can integrate a layout macro w/o a Verilog file. (I want to avoid inserting it by hand, would be cool if this somehow would be possible automatically)

1. make lef 2. make blackbox verilog 3. put blackbox verilog into your rtl 4. do openlane, use manual macro placement example. Copy the instance name from synthesis netliat to be sure it's correct. 5. Ru openlane w/ extra lefs and extra gds parameters set accordingly

@User have you tried this?

Yes. Only catch: power need to be connected manually. I do this by having an interactive script and after the flow is complete, but before the LVS is done I insert the power pins. For the vsdmixedflow, you dont need to manually connect power, since it connects to power rails

Can you post an example?

Unfortunately not right now. I will post it as soon as possible. Might take a couple of weeks.

Good idea, need to decide whether I go for blockage or a blackboxed Verilog…

you need both.

OK, then I know what to do, thanks!