Dumb xschem / spice question: if I have named pins coming into a schematic and I want to connect those pins together, how can I do it? I cant have two names on one net, right? Is the only option a 0 ohm resistor / 0V voltage source?
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Tim Edwards
05/29/2021, 11:58 PM
My understanding is that those are the only two ways in a SPICE netlist to have, effectively, one net with two different names. However, that does not necessarily mean that the schematic tool can't represent more than one name per net, but would still have to resolve them somehow when writing the netlist.
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Stefan Schippers
05/31/2021, 5:45 AM
@Weston Braun, as @Tim Edwards said the best option is a 0V source or 0Ω resistor, unless there is some alias or connect option, like for example HSPICE:
Handling subcircuit 'pass-thru' nodes in the schematic is not trivial since a choice has to be made about the node to keep and the node to drop.
In addition, since xschem outputs also Verilog and VHDL netlists, any 'node merging' needs to be checked also with these 2 formats.
In many situations i have used the '0V voltage source connection' to simulate a buffer, later replaced with an actual buffer in the subcircuit. In this case the 0v or 0Ω connection is perfect, since the output node is retained in the waveform viewer.
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Weston Braun
05/31/2021, 6:37 AM
I guess the real real question is I have multiple pins on the caravan test harness I am tying together (the bare I/O for higher current)
Weston Braun
05/31/2021, 6:38 AM
How should I do that such that ngspice, extraction, and LVS, all work correctly?
Weston Braun
05/31/2021, 6:38 AM
I guess I am back at using a metal resistor as a net tie?
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Tim Edwards
05/31/2021, 2:48 PM
If you need to separate the nets on the layout specifically, then yes, the procedure is to cut the net with a metal resistor in the layout, and then represent that metal resistor with the same metal resistor in the schematic.
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