I am designing an ldo with its bandgap circuit but when i put each schematic in a symbol i get this ...
m
I am designing an ldo with its bandgap circuit but when i put each schematic in a symbol i get this error after making the testbench The full netlist is attached below
r
Is Y1 the name of your symbol for Error Amp?
m
yes
r
manually edit the netlist and add an X before Y i-e make it XY1 and then run simulate from xschem. Do not re-netlist. Check if the error is still there
s
All subcircuit instance names should begin with X. This is a spice convention. Xschem does not enforce this since Verilog and VHDL have more flexibility in instance names. However if you place a symbol it should get a default name of
X1
,
X2
or similar, so unless you explicitly change it it should work.
m
@Stefan Schippers When generating spice/CDL netlists, I think Cadence automatically prepends an 'X' to subcircuit instance names, 'M' to mos device names, 'D' to diode names, etc.
s
@Mitch Bailey yes, I know, for xschem i decided to give more freedom in the hands of the designer. An xschem .sym of a subcircuit file specifies a template 'name=X1' so when you place a symbol in the schematic it will be X1 (or X2 if X1 is already present). However if designer decides to change the name to 'name=Y1' he can do so. He can even put a
*
prefix to comment out the device (This is an extreme case and very bad practice!) Enforcing 'X' on all symbols may not be ok for everyone, for example PCB designers often use U1, U2, U3 for pcb components. They don't simulate the design. They use xschem to export the netlist to a pcb editor, so they have all the components and ratlines representing the connections, and the usual U1, U2... naming. Xschem has however the ability to enforce a 'X' if you define the symbol format string as format=@spiceprefix@name..... See for example a MOS symbol in xschem_sky130. The usage of spiceprefix attribute can be enabled or disabled in the Simulation menu. The spiceprefix method is expecially useful if you need to generate 2 different netlists for simulation and for LVS. Simulation pdk often wraps MOS devices into subcircuits so you need the 'X' in front of all MOS instances, while for comparing a schematic netlist to layout you just need these devices with the usual 'M' prefix.
m
Thanks for the explanation. Sounds like you've already got things covered with the spiceprefix option.