I was looking at one of the submissions (https://efabless.com/projects/162) and was curious about the Verilog code and saw that it had this non Apache 2.0 header: "This file contains confidential and proprietary information of YongaTek and // is protected under internati".." Is it expected that as part of the submission the Verilog files be under the Apache 2.0 license as well? (Just curious as I was thinking in the future to take some of the interesting designs and mangle them up.. for example the https://efabless.com/projects/56 says there is a Bluetooth Low-Energy 2.4ghz Transceiver.... But https://github.com/ucberkeley-ee290c/OsciBear/tree/main/verilog/rtl doesn't have the code ? Hmm.)

@jeffdi: Please look at both issues (projects/162 and projects/56).

@Tim Edwards so how does that work if you have say other repos that make it? Is it enough to have a documentation that crisply explains how to get the sources and URLs to it (and those files having the right license)?

@Konrad Wilk: The Berkeley OsciBear project just appears to have improper links listed in the project description. If I remove the

/blob/main

from the end, I can reach the code; e.g., https://github.com/ucberkeley-ee290c/fa18-modem . It is not clear to me to what extent the prechecker is going to check for sources that are not part of the repository.

@Konrad Wilk you are correct - i’ll chase it down