open-source-silicon.dev

DRC error
```Metal3 spacing &lt; 0.3um (met3.2)
Metal3 &gt; 3um spacing to unrelated m3 &lt; 0.4um (met3.3d```

Just drew one big cap instead of an array of smaller ones.

That one does sound like an error in the capacitor drawing routine.  What are the parameters of the device set to?

I was drawing a 3x3 grid of 4x5 metal 3 mim caps

image.png

Okay, clearly the spacing in X is set wrong for the cap arrays.  I will fix that in the PDK;  meanwhile, just make a 1x3 array and copy it at the correct distance.

What is Linen?