a question about extracting the netlist with magic. When I do extract, ext2spice lvs, ext2spice, I end up with a spice file full of subcircuits that have the same name as the standard cells. How is magic doing this? If I loaded a gds made from a different PDK would it still be able to extract the netlist?

The GDS has cells with the same names as the Verilog standard cells. It would vary from PDK to PDK

Don't we provide tlef file to magic?

@Matt Venn: Magic is just extracting the entire layout from geometry as it sees it. The extraction is done entirely on rules from the tech file that describe how the layer geometry forms devices and connections. If you loaded a GDS from a different PDK, then you would need a valid tech file for that PDK to extract a valid netlist from it.