<@U016EM8L91B>, I'm working with Single Event Latch-ups (SELs). I'm curious to know about the DRC ru...
j
@User, I'm working with Single Event Latch-ups (SELs). I'm curious to know about the DRC rules for tap cells and guard rings. I don't see any rules related to the guard rings from the periphery-rules.rst. Is the seal rings the same as guard rings? Also, is the difftap same as tap cells? Thanks
t
The rules for well and substrate taps are in a separate section; the rule is 15um minimum spacing from tap contact center to edge of diffusion, or 6um outside of a "sparse tap density area", which is specified with a special ID layer and is supposed to be defined as anything that is less than 200um from the padframe. The seal ring is not a guard ring. It surrounds the entire chip and marks the boundary of the chip area. "difftap" is just a term meaning "diff or tap", which is all diffusion types. A "tap cell" is a standard cell that connects the power rails to well and substrate.
j
Thank you for the elucidation! Are the rules for substrate and tap cells defined in the periphery-rules.rst or a different file? Also, is it feasible to add guard rings to a design? If so, where can I find the DRC rules specific to guard-rings and the configuration variables required for the config.tcl?